Internship/Thesis: Developing an Eclipse plugin (Java) for the UVM template generator
For generation of SystemVerilog UVM test environments, DMOS GmbH uses a template-based generator. The edition of test sequences incorporates the IDE Eclipse. Subject of the project is to develop a plugin for Eclipse (using Java) which integrates the template generator into the Eclipse environment. Furthermore, the plugin should be extended in order to offer text formatting and autocomplete features for SystemVerilog.